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authIdHal_s : daniel-etiemble

Jeux d'instructions des processeurs

Daniel Etiemble
2016
Other publications hal-01794009v1
Image document

Parallel Light Speed Labeling: an efficient connected component algorithm for labeling and analysis on multi-core processors

Laurent Cabaret , Lionel Lacassagne , Daniel Etiemble
Journal of Real-Time Image Processing, 2018, 15 (1), pp.173-196. ⟨10.1007/s11554-016-0574-2⟩
Journal articles hal-01361188v1

Introduction à l’Internet des Objets

Khaldoun Al Agha , Daniel Etiemble
Techniques de l'Ingenieur, 2018
Journal articles hal-03004823v1

Introduction aux systèmes embarqués, enfouis et mobiles

Daniel Etiemble
2016
Other publications hal-01793572v1

Processeurs superscalaires "flots de données

François Anceau , Daniel Etiemble
2018
Other publications hal-01793606v1

Introduction à l'architecture des ordinateurs

François Anceau , Daniel Etiemble
2010
Other publications hal-01794102v1
Image document

High Level Transforms for SIMD and Low-Level Computer Vision Algorithms

Lionel Lacassagne , Daniel Etiemble , Hassan Zahraee , Alain Dominguez , Pascal Vezolle
Symposium on Principles and Practice of Parallel Programming / WPMVP, Feb 2014, Orlando, Florida, United States. pp.8, ⟨10.1145/2568058.2568067⟩
Conference papers hal-01094906v1
Image document

Evolution of Technologies and Multivalued Circuits

Daniel Etiemble
2019
Preprints, Working Papers, ... hal-02162117v1
Image document

High Performance SoC Design Using Magnetic Logic and Memory

Yahya Lakys , Jacques-Olivier Klein , Daniel Etiemble , Dafiné Ravelosona , Claude Chappert , et al.
VLSI-SoC: Very Large Scale Integration - System-on-Chip, Oct 2011, Hong Kong, China. pp.10-33, ⟨10.1007/978-3-642-32770-4_2⟩
Conference papers hal-01519767v1

Processeurs multithreads et multicoeurs

Daniel Etiemble
2018
Other publications hal-01793156v1

La réalisation des opérateurs logiques

Daniel Etiemble
2017
Other publications hal-01793651v1
Image document

Distanceless Label Propagation: an Efficient Direct Connected Component Labeling Algorithm for GPUs

Laurent Cabaret , Lionel Lacassagne , Daniel Etiemble
IPTA2017 - International Conference on Image Processing Theory, Tools and Applications, Nov 2017, Montreal, Canada
Conference papers hal-01656756v1

Parallel light speed labeling: An efficient connected component labeling algorithm for multi-core processors

Lionel Lacassagne , Laurent Cabaret , Daniel Etiemble
IEEE International Conference on Image Processing (ICIP), Sep 2015, Quebec, Canada. pp.3486-3489, ⟨10.1109/ICIP.2015.7351452⟩
Conference papers hal-01243310v1

Evolution de l'architecture des ordinateurs

Daniel Etiemble
2016
Other publications hal-01793615v1

Hiérarchie mémoire : les caches

Daniel Etiemble , François Anceau
2012
Other publications hal-01794025v1

Processeurs VLIW

Daniel Etiemble
2015
Other publications hal-01793958v1

Automatic Task-based Code Generation for High Performance Domain Specific Embedded Language

Antoine Tran Tan , Joel Falcou , Daniel Etiemble , Hartmut Kaiser
HLPP 2014, Jul 2014, Amsterdam, Netherlands
Conference papers hal-01061423v1
Image document

A new SIMD iterative connected component labeling algorithm

Lionel Lacassagne , Laurent Cabaret , Daniel Etiemble , Farouk Hebbache , Andrea Petreto
Principles and Practice of Parallel Programming / WVMVP, ACM, Mar 2016, Barcelone, Spain. ⟨10.1145/2870650.2870652⟩
Conference papers hal-01361101v1

Processeurs superscalaires multi-pipelines

Daniel Etiemble , François Anceau
2015
Other publications hal-01793667v1

Introduction au parallélisme et aux architectures parallèles

Daniel Etiemble , Franck Cappello
2017
Other publications hal-01793592v1
Image document

Algorithmic Skeletons within an Embedded Domain Specific Language for the CELL Processor

Tarik Saidani , Claude Tadonki , Lionel Lacassagne , Joel Falcou , Daniel Etiemble
PACT09 (Parallel Architectures and Compilation Techniques), Sep 2009, Raleigh, United States. pp. 67-76
Conference papers hal-00905054v1

Extensions SIMD des jeux d'instructions

Daniel Etiemble , Lionel Lacassagne
Techniques de l'Ingenieur, 2015
Journal articles hal-01793974v1

Processeurs : exécution pipeline des instructions

Daniel Etiemble , François Anceau
2013
Other publications hal-01793994v1

Hiérarchie mémoire : mémoire virtuelle

Daniel Etiemble , François Anceau
2014
Other publications hal-01794041v1
Image document

45-year CPU evolution: one law and two equations

Daniel Etiemble
Second Workshop on Pioneering Processor Paradigms, Feb 2018, Vienne, Austria
Conference papers hal-01719766v1