A FPGA partial reconfiguration design approach for cognitive radio based on NoC architecture
Résumé
A Cognitive Radio is the final point of software-defined radio platform evolution: a fully reconfigurable radio that changes its communication modules depending on network and/or user demands. His definition on reconfigurability is very broad and we only focus on the heterogeneous reconfigurable hardware platform for Cognitive Radio. Software Defined Radio (SDR) basically refers to a set of techniques that permit the reconfiguration of a communication system without the need to change any hardware system element. The goal of Software Defined Radio is to produce communication devices which can support several different services. These terminals must adapt their hardware structure in function of the wireless networks such as GSM, UMTS, wireless LAN standards like IEEE 802.11a/b/g... As a consequence, NoC offer good perspectives to future SoC in the way to satisfy SDR concept. Conception, validation and evaluation of solutions for NoC design (mapping of cores, topology, FIFO and link sizes) is conducted through simulations. We are proposing to extend the NoC structure to a FPGA where PR (Partial Reconfiguration) is used to dynamically reconfigure the requested IP block of the telecommunication chain. This work is part of our contribution for E2RII project and IDROMEL project.